Synchronous
A common view of time is available to all of the attached devices
- The MAR and MDR on the controller drives the address lines
- All instructions come from memory
- R/W means (read not write) so read if it is set to 1
- The Controller Phase is when the clock is high
How to Read
- Initiate with device
- Set R/W line
- Set address to read address (happens at the same time as the R/W line by different parts of the CPU)
- The memory assumes the bus signal is correct
- The memory drives the data bus signals with the requested value
How to Write
- Same process as read, except data is valid from the first rising clock edge, writes stay on the line until the next rising edge
Propagation Time
The time it takes for a signal to propagate from the controller to the device ().
- Address propagation time
- Data propagation
- Bus propagation
- Setup time
- Hold time
- Access time
- Store time
- Skew time
- margin time
See notes for definitions
There is a select time that is required for a device interface attached to a bus to detect the current transfer that is involved. This doesn’t include time required to actual device selection.
Timing
Reads are slower than writes because there are more work to do in the peripheral phase!
Skew
The maximum difference in signal propagation time. We are restricting skew to be a characteristic of our multi-bit signals, everything else is propagation.